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Job-Art: Wissenschaftliche Jobausschreibungen

Doctoral Student - Reliability and Defect Studies of High-K Gate Stack MOSFETs under Ionizing Radiation

Fachgebiet
Microelectronics / Device Physics
Arbeitsstätte
Graz University of Technology
Website
Bewerbungsfrist
31.08.2020

Ausschreibungstext

Doctoral Student Position

Reliability and Defect Studies of High-K Gate Stack MOSFETs under Ionizing Radiation

30h / week

 

Research Subject Description:

Structural defects like interface- and oxide- traps influence MOSFET characteristics. Also they are considered the main cause for lifetime degradation. Under external conditions: elevated temperature, applied electric field and presence of ionizing radiation, as well as their relaxation, the occupation and distribution of trapping sites evolves, leading to change of device electrical characteristics.

Scaling of CMOS technologies brings many challenges and the presence high-K gate dielectric in the modern technologies is one of the consequences. Further, in scaled devices the number of emerging “second-order” effects increases, making the device characteristics and response to stress conditions more complex to understand. Consequently modelling becomes more difficult. Finally for small devices some characterization steps are more challenging with known methods due to their fragility in terms of lower breakdown voltages. Also some parameters are more difficult to measure because of smaller capacitances, currents and charges of tiny devices.

For the SIRENS project X-ray degradation of high-K MOSFETs is of particular interest, targeting future applications in ionizing environments. A detailed analysis is required to understand the evolution of device characteristics under various exposure conditions and the geometrical dependence on the radiation effects. The outcomes will enable prediction of lifetime and optimization of operating conditions and device geometry.

Responsibilities:

The doctoral candidate will conduct fundamental research in frame of SIRENS project funded by Austrian Science Fund FWF, being part of international team. Tasks are conducted under guidance and frequent contact with supervisors and they include:

- Display initiative in identifying and resolving research related scientific problems,

- Perform literature study to identify state of the art,

- Study methodologies to collect, analyze and interpret the measurement results,

- Co-development of concept for device reliability studies,

- Layout the test devices arrays under Cadence Design Environment in given CMOS process,

- Design and adaptation of electrical device characterization environment,

- Plan and organize scientific investigations such as stress tests for low energy X-ray (that will be conducted in dedicated radiation protected laboratories),

- Collect data and measurement results and conduct scientific analysis,

- Perform device-level simulations with Technology CAD.

Since the work is carried out at the higher education institution (Graz University of Technology), where cooperation with students and knowledge transfer are of high importance, it is expected that the candidate will work closely with Bachelor and Master Students on related research tasks.

Occasionally the candidate will have to travel to experimental sites in Europe and to participate in workshops. Further it will be required that the research findings are presented at international conferences and published in journals, as well as in media and events for the general public (like e.g. “Lange Nacht der Forschung”). In coordination with project team and research unit the candidate will be co-responsible for research data management, for data created and collected throughout the project.

Required Skills / Experience:

- Good understanding of semiconductor device physics

- Familiar with integrated circuits technology

- Experience in C/C++, Matlab or Python programming

- Master’s degree in Physics or Electrical Engineering

- Excellent written and spoken English

Desired Skills / Experience:

- Familiar with basic design flow in Cadence integrated circuit design environment

- Experience in device characterization

- Basic understanding of electronic circuits

- Experience with Synopsys TCAD environment

Desired Start and Organizational Unit:

Possible start in September 2020

Graz University of Technology, Institute of Electronics

under subscription to Doctoral Programme at Graz University of Technology

Employment contract

Employment contract for doctoral student 30 hours/week with salary according to B1 category of the Austrian Collective Bargaining Agreement for University Staff.

This corresponds to gross salary of arr. 2200 EUR/month paid 14 times per year.

Application Submission and Deadline

CV accompanied by certificates, master thesis (pdf or weblink), letter describing relevance of experience for this research subject and the motivation to join the team

Submit per email to: alicja.michalowska(at)tugraz.at

Kontakt-Person(en)

Haupt-Kontakt
Name: Alicja Michalowska-Forsyth

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