Stabilization of the High-k Phase in ALD-grown Rare-Earth Based Oxides

In summary the exploration of new material and processing concepts for the next generation p-metal oxide semiconductor (p-MOS) technology is aimed. The scope of this project addresses the structural, electrical, and chemical principles necessary to enable the stabilization of high-k phases in rare-earth based oxides deposited on thin Ge channels. High-k gate oxides grown by e.g. Atomic Layer Deposition (ALD) are principal components in modern and ultra-scaled complementary metal oxide semiconductor (CMOS) devices. While Si was the material of choice for many decades in semiconductor technology, Ge is the most promising material for future p-MOS devices as it offers the highest hole mobility among all semiconductor materials. Generally, the deposition process of the thin oxide films in combination with subsequent metal deposition and annealing process, play a key role in modern CMOS devices, as the chemical and physical properties of the gate oxide strongly determines the electrical characteristics, and thus the functionality and the performance of the device. The finding of fundamental key relations between the oxide deposition and the resulting structural and electrical properties of the high-k gate oxides are main issues of this project. Here, gas-phase to surface interactions, mechanisms and kinetics of adsorption and desorption processes, dominant reaction paths, transport processes involving diffusion and/or drift of uncharged and charged species influencing the deposition process and their impact to the device characteristics are of primary interest. Many of the mentioned issues and especially the two key questions - i) which rare-earth based oxides can be stabilized as an efficient gate oxide and ii) which oxides can be stabilized in a definite very high-k phase (e.g. the tetragonal phase of ZrO2 stabilized by rare-earth doping) - are still in controversial debate or are not yet clarified. Therefore, the proposed project will significantly contribute to the recent scientific discourse on high-k materials, which is continually predefined by the International Roadmap for Semiconductor Technology (ITRS). Thin oxides with high dielectric constant k - e.g. zirconium oxide (ZrO2 ), lanthanum oxide (La 2 O3 ), yttria- stabilized zirconia (YSZ), lanthanum-stabilized zirconia (LSZ), lanthanum-stabilized lutetium oxide (LaLuO3 ), and lanthanum-stabilized hafnium oxide (LSH), as well as scandate based oxides (e.g. DyScO x , ZrScOx , HfScO x , LuScO x ) are to be grown by ALD onto pre-treated and well-conditioned Ge and strained Ge substrates. In a first step, the focus is on the deposition of these rare-earth-stabilized oxides on planar substrates to lay the foundations for explorative paths, to clarify key correlations, and to parameterize the growth-behaviour and the interface performance relative to the various oxide materials and the pre-treated Ge starting surface. As an important result, the stabilization of very high-k oxide phases by diffusive atoms from the substrate or engineered rare-earth interlayers should be achieved. In a second step, the focus will be put on the deposition of such stabilized oxides on etched Fin-structures and Nanowires (NWs) to probe theoretical predictions, which claim the best performance for gate all-around MOS field-effect transistor (MOSFET) devices. Since the oxide/semiconductor surfaces often suffer from interface defects, additionally applied intermediate layers address the mediation between the high-k dielectric and the semiconductor surface to reduce interface trapping states, to improve interfacial performance or to stabilize a very high-k oxide phase. On top of these oxide films, thin metal layers (e.g. Pt) can be applied in order to further improve the interfacial quality by means of catalytic dissociation of oxygen. The engineered oxide stacks will then be incorporated in micro- and nanoscaled Ge-based MOSFET devices, and be investigated in terms of their physical, chemical and electrical characteristics and dynamics, whereat the impact of both, the process issues and the operation conditions on the final device performance will be addressed. The investigation of the physico-chemical and electrical properties of these advanced oxides extracted from fully processed devices promises new prospects for fundamental improvements in next generation CMOS technology.

The stabilization of the high-k phase in gate oxides as well as their integration in MOSFET with high mobility channels like Germanium was aspired within the frame of the project STAPHASE. To identify a stable gate oxide stack suited for the passivation the unstable Ge(100) surface on the one hand and to provide simultaneously a low equivalent oxide thickness (EOT) were one main goal of the project. In the course of the project it turned out that the rare-earth metal oxide Y2O3 is one of the most promising oxides for establishing very low interface tap densities (Dit) on Ge(100) comparable to those known from the Si/SiO2 interface. In fact, we demonstrated by electrical characterization techniques that well engineered thermal annealing processes of the gate stack under oxygen and forming gas atmosphere can bring down Dit to values <1011 eV-1cm-2. It is proven by X-ray Photoelectron Spectroscopy that thermal stabilizing Yttrium-germanate phases prevent desorption of volatile GeO from the interface helping to stabilize a thin high quality GeO2 in between the high-k oxide and the Ge substrate. It turned out that similar mechanism are evident at other interfaces like e.g. at the HfO2/Ge interface. Hafnium-germanate is stabilizing GeO2 resulting in a very low interface trap density Dit in the range of 1-2 x1011eV-1cm-2 but also providing EOT < 2nm and leakage currents < 10-7 A/cm2. Further on, it is shown that in ternary oxide gate stacks like HfO2/Y2O3/GeO2, binary mixed germanates are formed, offering similar benefits to the Ge interface. Another finding of the project concerns Pt assisted oxygen annealing earlier developed for ZrO2/La2O3 stacks. It is proven that a thin 5 nm thick Pt layer enhances the diffusion of atomic oxygen also in oxides like Y2O3 and HfO2, an effect which can be used for efficient Dit - lowering at the Ge/high-k oxide interface. Concerning the development of a MOSFET fabrication process, a very compact and stable process is developed to enable a fast processing of Schottky-Barrier MOSFET devices with optional Ni, Pt, and Rh source/drain regions, respectively. Promising hole mobilities in the range of up to 200 cm2 V-1s-1 with a nearby complete saturation of the drain current in the saturation region where achieved in a very early development stage together with high on-off current ratios of >106. Therefore, one key technology development is the establishing of highly rectifying Schottky-contacts. One major outcome of the project shows the influence of surface recombination currents at the edge of a metal contact. Here, conventional PtGe contacts were examined as model system in order to study the impact of more uncommon parameters like minority carrier response time and interface trap density on the forward to reverse current ratio and on the Schottky-Barrier (SB) height. It turns out that not only the metal to semiconductor interface is crucial for high-quality rectifying contacts but also the Schottky-contacts surrounding Ge surface which, however, can be well passivated by Atomic Layer Deposition. In view to novel high mobility substrates, very thin metal films on Si(111) are also examined showing interesting features in the resistance characteristics. Here, it is found that instead of scattering effects often cited, effects of local Schottky depletion zones are playing an essential role in the evolution of the resistance characteristic. Also thin metal films like Chromium included as interfacial layer into Metal-Insulator-Metal memory devices are analyzed. Here, it is shown that their electrical performance in terms of linearity is remarkably improved.