Studies of robustness of analog integrated circuits

Analog integrated circuits (IC) are the subject of research in many areas such as energy efficiency, low noise sensor interfaces or high speed signal processing and transmission. The common feature required in all these domains is the robustness; robustness against any kind interferences. Whatever the purpose of the circuit, it must maintain its desired operation under real-world conditions. However typically in the target system, with many other surrounding active elements, there are additional external disturbances (high energy transient pulses, radio-frequency interference and radiation). These disturbances are usually not addressed during the design and simulation phase of the circuit, and often not even tested in an experimental evaluation test setup once the first prototype is available. A sufficient immunity to these effects is especially important in case of e.g. automotive and medical applications, where malfunction of an IC might become a real question of personal safety. However, the continuous demand for very large scale integration electronics, reduced spacing between components on the printed circuit board (PCB), lower supply voltages of the IC and increasing operating speed make it more challenging to build systems immune to external interferences. The objective of this research project is to find new methods and techniques to improve the current state of analog IC design: starting on the IC block-level with dedicated design techniques and robustness-oriented simulations, through physical layout of test-ICs and finally also focusing on the PCB-level placement and selection of components. In the first phase of the project the sources of potential disturbances will be identified, such as: external radio-frequency interference (RFI), transient pulses e.g. electrostatic discharge (ESD) and bursts, radiation sources and their intensity, internal interferences in a mixed-signal circuit. These disturbances may enter the circuit indirectly e.g. through connected cables or signal loops on the PCB acting as potential antennas for noise, or they can occur as a slow damage or degradation in case of radiation. The challenge of this project phase is to translate their influence onto an equivalent circuit- level disturbance model. The next step is to simulate the effects of the modeled disturbances and to accordingly modify the electronic circuit to maintain the desired functionality while improving immunity to the potential hazards. Finally, once selected test-ICs are fabricated and placed on a carefully optimized PCB, experimental comparison with the simulations is envisaged. The principal goals for the project are: understanding the influence of external and internal interferences in basic analog building blocks and defining design guidelines for robust analog IC as well as PCB design to ensure first time right designs of integrated circuit and final electronic applications.

Integrated circuits (ICs) are present in nearly every aspect of our lives, wherever electrical devices are present. This is ranging from the communication and computing devices, like PCs, smartphones and mobile phones, through numerous home appliances, health-care and medical diagnostics as well as applications in the industry, transportation and energy sector. The average size of an IC is in the order of square millimeter, with an individual transistor small enough that several would fit in the human hair cross-section. They operate at low voltage supplies, with very small currents and they are extremely sensitive. Meanwhile the ICs have to face different environmental conditions of temperature changes, exposure to humidity, vibration as well as to electrical and electromagnetic disturbances. In applications where safety is critical and replacement of the IC in the instrument is very expensive or sometimes even impossible the IC reliability aspect is extremely important. The RobustIC project is focusing on the evaluation of how robust selected circuits are when exposed to high power transient electrical pulses, like the electrostatic discharge or in-system conducted emissions and to high energy electromagnetic radiation, known as the ionizing radiation. A set of building blocks of typical IC has been selected and designed in a form of a test-IC in different variations using known and novel mitigation techniques. These blocks included: (A) a unit that protects the rest of the circuit from the high power electrostatic discharge pulses (B) a voltage reference unit that is necessary for almost every electrical measurement (C) a power-on detection unit that signalizes the IC that the power supply is connected and at the correct level. These have been fabricated in multiple variants and in a standard 180 nm CMOS process. After functional characterization the circuits have been stressed with the external disturbances, in particular with the high power transient pulses and the ionizing radiation. The main outcome of the project based on the multi-physics simulation and the data obtained from the measurements is a set of new design guidelines for specific cases of circuits and applications. One of the guidelines is on how to design a circuit protecting the rest of the IC against electrostatic discharge. The consequence is an increased device capability of conducting 70% higher current while keeping the parasitic parameters (e.g. capacitance) at the same level. This is particularly important for sensor interfaces to maintain high measurement sensitivity. Another guideline proposes use of a novel diode arrangement in the voltage reference unit that ensures stable operation in the ionizing radiation environment. The solution is very simple as it keeps the rest of the block design unchanged and results in the same output parameters. It is particularly important for industrial, medical and space applications.