Ultra-sensitive PIN and avalanche photodiode receivers
Ultra-sensitive PIN and avalanche photodiode receivers
Disciplines
Electrical Engineering, Electronics, Information Engineering (70%); Physics, Astronomy (30%)
Keywords
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PIN photodiode,
Avalanche Photodiode,
Optical Receiver,
Optical Sensor,
Integrated Circuit
Optical sensors and receivers with so-called single-photon avalanche diodes (SPADs), which can detect the smallest units of light being called photons, may show false detections from dark counts, afterpulsing and optical crosstalk (in case of arrays), which lead to bit errors. Therefore, complex, area and power hungry signal processing circuits are needed to obtain bit error ratios low enough for error correction. Furthermore, after about a decade of research hype on SPADs and on their applications, the potential of SPADs approaches to its limits. In USPAR it will be investigated how few photons are sufficient in one bit to still obtain low bit error ratios, i. e. what sensitivities, data rates, light-sensitive area, chip area and power consumption of optical receivers are possible using the principle of integration of photogenerated charges on low-capacitance photodiodes or on small integration capacitors like in widely used image sensors. It will be determined how these properties scale with reduction of structure sizes in modern CMOS technologies. Integration of photodiodes and amplifiers on the same chip are essential to realize low capacitances of the input node. The low-capacitance photodiodes and low-noise amplifiers will be designed in the most difficult, so-called full custom, style to reduce all parasitics in integrated circuits as far as possible. Test chips will be fabricated as Application Specific Integrated Circuits (ASICs) to be able to verify the innovative approaches with measurements. PIN photodiodes and linear-mode avalanche photodiodes in PIN photodiode CMOS technology are known to possess small capacitances. They will be reduced further in their capacitance by using thicker low-doped epitaxial layers. High-gain amplifiers will enable a large integration efficiency also for larger photodiode capacitances and make much larger light-sensitive areas of photodiodes possible than in active pixel image sensors. The USPAR receivers will be much easier to be applied in practice due to the following advantages. The quantum efficiency of PIN photodiodes is larger than the photon detection probability of SPADs and a lower photodiode reverse bias voltage is sufficient. The USPAR receivers will not have a dead time, afterpulsing and optical crosstalk. A much lower bit error ratio than with SPADs is possible, skipping the need for error correction.
Optical sensors and receivers with single-photon avalanche diodes (SPADs), which can detect the smallest units of light being called photons, show false detections from dark counts, afterpulsing and optical crosstalk (in case of arrays), which lead to bit errors. Therefore, complex, area and power hungry signal processing circuits are needed to obtain bit error ratios low enough for error correction. Furthermore, after about a decade of research hype on SPADs and on their applications, the potential of SPADs approached to its limits. In USPAR it was investigated how few photons are sufficient in one bit to still obtain low bit error ratios, i. e. what sensitivities, data rates, light-sensitive area, chip area and power consumption of optical receivers are possible using the principle of integration of photogenerated charges on low-capacitance photodiodes or on small integration capacitors like in widely used image sensors. It was determined how these properties scale with reduction of structure sizes in modern CMOS technologies. Integration of photodiodes and amplifiers on the same chip are essential to realize low capacitances of the input node. The low-capacitance photodiodes and low-noise amplifiers were designed in the full custom style to reduce all parasitics in the integrated circuits as far as possible. Test chips were fabricated as Application Specific Integrated Circuits (ASICs) in 0.35 m, 0.18 m and 55 nm CMOS technologies to verify the innovative approaches with measurements. Dot PIN photodiodes and linear-mode avalanche photodiodes with very low capacitance by using thicker low-doped epitaxial layers were realized. Multi-dot photodiodes made much larger light-sensitive areas of photodiodes possible. With dot PIN photodiodes, the same sensitivity as with 4-SPAD receivers in the same 0.35 m CMOS technology was achieved. Data rates were increased by a factor of four to 200 Mbit/s. With avalanche photodiodes, a better sensitivity as with SPAD receivers was shown. The gap to the quantum limit was reduced to 10 dB. The USPAR receivers are much easier to apply in practice due to the following advantages. The quantum efficiency of PIN photodiodes is larger than the photon detection probability of SPADs and a lower photodiode reverse bias voltage is sufficient. The USPAR receivers do not have a dead time, afterpulsing and optical crosstalk. A much lower bit error ratio than with SPADs is possible, skipping the need for error correction.
- Technische Universität Wien - 100%
- Alexander Zimmer, XFAB Semiconductor Foundries AG - Germany
- Saeed Saeedi, Tarbiat Modares University - Iran
Research Output
- 55 Citations
- 14 Publications
- 1 Policies
- 4 Datasets & models
- 1 Scientific Awards
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2025
Title Low Junction Capacitance PIN and Avalanche Photodiodes in 180 nm CMOS DOI 10.1109/access.2025.3617104 Type Journal Article Author Gasser C Journal IEEE Access Pages 173887-173894 Link Publication -
2025
Title APD direct detection receiver OEIC operating 14.1?dB above the shot noise quantum limit. DOI 10.1364/oe.577195 Type Journal Article Author Laube S Journal Optics express Pages 45337-45345 Link Publication -
2025
Title Slow-Slope Reset Scheme for Highly-Sensitive CMOS Integrate-and-Dump Receiver OEIC DOI 10.1109/access.2025.3602093 Type Journal Article Author Laube S Journal IEEE Access Pages 154599-154609 Link Publication -
2025
Title Voltage-Controlled Pulsed Current Source With Hyperbolic, Squared Hyperbolic, and Quasi-Dirac Delta Function Time Dependence DOI 10.1109/tim.2025.3545186 Type Journal Article Author Petričević D Journal IEEE Transactions on Instrumentation and Measurement -
2024
Title Highly-Sensitive Integrating Optical Receiver With Large PIN Photodiode DOI 10.1109/jphot.2024.3487302 Type Journal Article Author Laube S Journal IEEE Photonics Journal Pages 1-9 Link Publication -
2024
Title Ultra Sensitive PIN-Diode Receiver Utilizing Photocurrent Integration on a Parasitic Capacitance DOI 10.1109/access.2024.3447731 Type Journal Article Author Gasser C Journal IEEE Access Pages 118371-118376 Link Publication -
2023
Title Ultra-Low Capacitance Spot PIN Photodiodes DOI 10.1109/jphot.2023.3251893 Type Journal Article Author Goll B Journal IEEE Photonics Journal Pages 1-6 Link Publication -
2023
Title Area and Bandwidth Enhancement of an n+/p-Well Dot Avalanche Photodiode in 0.35 µm CMOS Technology DOI 10.3390/s23073403 Type Journal Article Author Kohneh Poushi S Journal Sensors Pages 3403 Link Publication -
2023
Title A Near-Infrared Enhanced Field-Line Crowding Based CMOS-Integrated Avalanche Photodiode DOI 10.1109/jphot.2023.3280251 Type Journal Article Author Poushi S Journal IEEE Photonics Journal Pages 1-9 Link Publication -
2023
Title Ultra-Sensitive PIN-Photodiode Receiver DOI 10.1109/jphot.2023.3279935 Type Journal Article Author Schneider-Hornstein K Journal IEEE Photonics Journal Pages 1-9 Link Publication -
2024
Title Design and characterization of CMOS avalanche photodetectors Type PhD Thesis Author Saman Kohneh Poushi -
2024
Title Ultrasensitive Reset-Less Integrator-Based PIN-Diode Receiver With Input Current Control DOI 10.1109/lssc.2024.3520338 Type Journal Article Author Gasser C Journal IEEE Solid-State Circuits Letters Pages 17-20 Link Publication -
2023
Title Dot PIN Photodiodes With a Capacitance Down to 1.14 aF/ m 2 DOI 10.1109/lpt.2023.3242047 Type Journal Article Author Goll B Journal IEEE Photonics Technology Letters -
2022
Title CMOS Integrated 32 A/W and 1.6 GHz Avalanche Photodiode Based on Electric Field-Line Crowding DOI 10.1109/lpt.2022.3195191 Type Journal Article Author Poushi S Journal IEEE Photonics Technology Letters Pages 945-948 Link Publication
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2022
Title Lecture Type Influenced training of practitioners or researchers
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2025
Link
Title Slow-Slope Reset Scheme for Highly-Sensitive CMOS Integrate-and-Dump Receiver OEIC DOI 10.48436/ne6qp-zy849 Type Database/Collection of data Public Access Link Link -
2025
Link
Title APD direct detection receiver OEIC operating 14.1 dB above the shot noise quantum limit DOI 10.48436/sngab-3b334 Type Database/Collection of data Public Access Link Link -
2024
Link
Title Ultra Sensitive PIN-Diode Receiver Utilizing Photocurrent Integration on a Parasitic Capacitance DOI 10.48436/hfp8t-mf348 Type Database/Collection of data Public Access Link Link -
2024
Link
Title Highly-Sensitive Integrating Optical Receiver With Large PIN Photodiode DOI 10.48436/2q37q-7f133 Type Database/Collection of data Public Access Link Link
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2025
Title Invitation to MIPRO 2026 as speaker. Type Personally asked as a key note speaker to a conference Level of Recognition Continental/International